For example, by the moving picture experts group (MPEG) scheme for use in image coding, when a motion vector is detected in a target block of interest within blocks having a certain size, movement compensation is performed on the basis of this motion vector, to obtain a predictive image of the target block. In the MPEG scheme, a difference between each pixel in the target block and the corresponding pixel of the predictive image is then calculated and a value of the difference is encoded, thereby realizing high-efficiency compression.
As an algorithm for detecting motion vectors, a block matching method, for example, is known.
For example, as shown in FIG. 1, if it is assumed that when a block in an f'th frame is a target block and a (f+1)'th frame is a reference frame that is referenced for detection of motion vectors to detect a motion vector headed from the (f+1)'th frame to the f'th frame as a motion vector of the target block, by the block matching method, a predetermined range centered at a position of the target block in the (f+1)'th frame is set as a search range for vector search. Furthermore, from the search range in the (f+1)'th frame, a block having the same size as that of the target block is selected as a candidate block for a predictive image of the target block, to obtain difference information relating to a difference between the target block and the candidate block.
That is, for example, if the target block and the candidate block each have a size of four horizontal pixels times four vertical pixels, as shown in FIG. 2, a difference between each of the pixels of the target block and the corresponding pixel of the candidate block is obtained and hence an absolute value of this difference (absolute difference value) is also obtained. Furthermore, a total sum of those absolute difference values is obtained and for all of the candidate blocks that can be selected in the search range, a total sum of the above absolute difference values is obtained.
Then, one such (hereinafter referred to as “minimum candidate block” appropriately) of the candidate blocks that can be selected in the search range as to minimize the total sum of absolute difference values is obtained, so that a vector headed from this minimum candidate block to the target block can be obtained as a motion vector.
It is to be noted that if as the search range, a larger range than the target block and the candidate block is intended to be used and the target block and the candidate block each have four pixels times four pixels as described above, a range having a size of, for example, about 30 pixels times 30 pixels through 50 pixels times 50 pixels is used as the search range.
FIG. 3 shows a configuration of one example of a conventional motion vector detection device for obtaining a motion vector by the block matching method.
The motion vector detection device of FIG. 3 comprises an image memory 201 for storing image data and a motion vector extraction section 202 for obtaining a motion vector through calculation by use of the image data. The image memory 201 and the motion vector extraction section 202 are connected to each other via a data bus.
In the motion vector detection device having such a configuration as described above, image data of the target frame and the reference frame is stored in the image memory 201. The motion vector extraction section 202 reads the target block and the candidate block from the image memory 201 via the data bus, to obtain a total sum of absolute difference values between these target block and candidate block. The motion vector extraction section 202 further picks up such a candidate block (minimum candidate block) of those that can be selected in the search range as to minimize the total sum of the absolute difference values and obtains a vector headed from this minimum candidate block to the target block as a motion vector of the target block.
In the motion vector detection device of FIG. 3, to detect a motion vector, an amount of image data is read from the image memory 201 frequently and supplied via the data bus to the motion vector extraction section 202.
The image memory 201 for storing image data, on the other hand, is typically comprised of a plurality of memories (semiconductor memories). That is, in FIG. 3, the image memory 201 is comprised of six memories 2011-2016.
The memories 2011-2016 of the image memory 201 each occupy a relatively large area, so that to transfer image data from each of these memories 2011-2016 to the motion vector extraction section 202, the data bus connecting each of the memories 2011-2016 and the motion vector extraction section 202 needs to be relatively long. The long data bus could give rise to various problems when it is driven.
Specifically, the long data bus would give large capacitance between a wiring line of this data bus and a substrate, thus bringing about a large delay (wiring delay) in data transfer. In addition, capacitance that occurs between the wiring lines of the data bus gives rise to cross-talk between these wiring lines. Further, in recent years, semiconductor processes have gone finer and finer, so that the cross-talk between the wiring lines has become a big problem.
That is, as a spacing between wiring lines becomes smaller due to the increasingly more microlithographic semiconductor processes, impedance between the wiring lines (wiring impedance) increases; to prevent this, the wiring lines need to be thicker. If the spacing between the wiring lines becomes smaller and they become thicker, capacitance between the wiring lines becomes larger, so that cross-talk cannot be ignored.
Further, conventionally, on the wiring capacitance occurred in wiring line, it has been necessary only to take into account capacitance between the wiring lines and the substrate; moreover, since the substrate has a constant potential, the problem of the wiring capacitance has not been no significant in simulation of the image memory 201.
However, if the wiring capacitance between the wiring lines themselves increases and becomes predominant as described above, apparent capacitance of a target wiring line varies depending on how a signal transits in level on the wiring line adjacent to this target one and the wiring delay changes correspondingly, thereby making it difficult to conduct simulation.
Further, if the data bus of the image memory 201 becomes longer, disturbances become remarkable in waveforms of a signal owing to reflection by an end surface of its wiring line.
To solve this problem, such a method is available that, as shown in FIG. 4, a cache memory 203 is arranged between the image memory 201 and the motion vector extraction section 202 to make up a motion vector detection device.
In the motion vector detection device of FIG. 4, the cache memory 203 reads from the image memory 201 image data that is used frequently by the motion vector extraction section 202 to store it. The motion vector extraction section 202 uses the image data stored in the cache memory 203 to obtain a motion vector by the block matching method.
In the motion vector detection device of FIG. 4, image data transferred from the image memory 201 to the cache memory 203 and stored therein need not be read from the image memory 201, so that it is possible to mitigate the above-described problem of frequent reading of image data from the image memory 201 via the long data bus.
However, in this case, it is necessary for a redundant memory, i.e., the cache memory 203, separately from the image memory 201, which suffers from an issue of overhead.
Thus, the present applicant has earlier proposed such a configuration that process data containing instructions required to execute respective processes of motion vector detection processing may be permitted to move through a plurality of series-connected execution means to executes the image processing (see Japanese Patent Application No. 2002-236877). By this configuration, for example, a motion vector can be detected by easy-to-design hardware free from a long data bus and a cache memory.